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Take a walk in the engineer’s shoes: I need an 80 MHZ network controller for my new project and I found one in the PLM/PDM system. That was easy. Now a quick check in the procurement database to do a price and availability check. So far so good, now on to the component engineering system to see if there are any possible lifecycle issues with a 10-year minimum requirement. It’s my lucky day, no issues and it’s a company-preferred part with an ECAD library instance.
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Using feedback from products in the field to continuously improve design modules used as the basis for product development can increase product performance and reliability and reduce development time.
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As we welcome increasing numbers of IoT devices into our industries, offices and home lives, we shouldn’t be surprised to see increasing electromagnetic (EM) congestion. Or, as it’s now dubbed, the ‘Interference of Things’.
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A customer recently asked me if CR-8000 Design Force could support stretchable flex designs. At first, I found the question odd, until they shared their intent: wearable electronics. The idea of wearable electronic products like head and wrist bands sparked an interesting conversation and piqued my interest.
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Man-carried military communication systems often consume large amounts of power. The heat must be removed from the electronics package to avoid frying sensitive electronic components. The package typically is designed to be carried in a backpack which often puts difficult constraints on the form factor and weight of the system
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We’re happy to announce that Speedstack, Polar Instruments’ layer stackup design/documentation tools, can now be directly linked to Zuken’s CR-8000 Design Force and DFM Center.
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Tips for when routing differential pairs - You can tell when something isn’t as clear as it should be. The same questions come up time and again. You ask three experts and get three different answers. Routing differential pairs can be like that. Why? Because “it depends” - on exactly what signals those pairs are carrying and what kind of PCB you’re creating.
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Do you still use Post-it Notes? Invented in 1979, this simple, yet incredibly powerful, communication mechanism is still commonly found in engineering and design departments. Despite modern electronic communication, many companies still struggle to provide a replacement for their ease-of-use and versatility.
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Zuken has been developing PCB design tools for the automotive market for years. With automotive electronics worth over $200 billion globally, and growing every day, Zuken is preparing for a brave new world of smart cars, and autonomous and electric vehicles.
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Simply draw a Dragon area around your BGA. Then select the Dragon area and create a strategy to fanout the pads of your BGA - Watch movie
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There is one thing that all design engineers will agree on: creating and gathering all the required data for PLM is error-prone and can be a royal pain. We all understand the value of releasing our design data to the corporate PLM system but our design process dictates multiple release points, and each one has a different purpose and data requirements.
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I don’t think I’m generalizing when I say that designers working on complex high speed designs really don’t want to expend a lot of time and effort dealing with power integrity problems. And they especially don’t want to do it using tools that are detached from their design flow. In today’s complex PCBs, we’re talking advanced processors, complex FPGAs and superfast memories, which all share various voltage ranges.
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XJTAG has partnered with Zuken create a new plugin for Design Gateway and is offering it free of charge. The plugin, called XJTAG DFT Assistant, helps to validate correct JTAG chain connectivity, while displaying boundary scan access and coverage onto the schematic diagram through full integration with Design Gateway.
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When it comes design rule checks for PCB designs, there are checks that should be performed that are just as important as spacing rules. Strict adherence to basic PCB design rule checks, such as track to track, track to via, via to via, pad to track etc. – though necessary to avoid short circuits – only scratch the surface when trying to identify potential design flaws.
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Advanced packaging techniques such as system-in-package (SiP), fan-out wafer-level packaging (FOWLP), 3D die stacks, etc. have been around for over a decade, yet with any other EDA design tool, it is still a tedious, time consuming, and error-prone process to implement these designs.
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As we witness the birth of an era of connected devices with smart homes, connected cars and smart networked supply chains and factories, we might imagine that unexpected failures of electronic products would be a rarity.