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As we witness the birth of an era of connected devices with smart homes, connected cars and smart networked supply chains and factories, we might imagine that unexpected failures of electronic products would be a rarity.
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Since it contributed to making the iPhone 7 even thinner than its predecessors, fan-out wafer-level packaging (FO-WLP) technology has risen in the collective consciousness. By adopting FO-WLP on this scale, Apple sent out a signal that though highly novel, the technology had matured.
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Because I’ve been in the electrical/electronics (E/E) engineering industry for such a long time, I can still remember drawing PCB layouts manually. We would then work out the connection lengths of wire harnesses by laying out waxed cord lacing on a physical prototype.
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Toshiba faced a difficult design problem: their TransferJet™ technology was embedded in a customer cell phone, and when the next rev of the phone came around, they learned that they needed to shrink the board from 8mm x 8mm to 4.5mm x 6mm, and they had to shrink the module thickness from 1.7mm to 1.0mm...
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During PCB West Exhibition Day, Sierra Circuits met Humair Mandavia, Chief Strategy Officer at Zuken. After his joint interview with Simon Fried, CBO of Nano Dimension, we discussed 3D PCB designing, and Zuken’s product, CR-8000 with him.
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Sierra met Steve Watt, Manager of PCB Engineering at Zuken, during PCB West 2017 at the Santa Clara Convention Center. After his presentation on how to improve flexible printed circuit manufacturing, he shared a few tips in front of our camera. Listen to him discuss CR-8000, DfM checks, and flexible PCB designing.
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This is one pretty scary world we live in. Every day there are stories about data breaches, network hacks and even possible spying by foreign software and hardware suppliers. Every individual has become hyper-aware of the security issues revolving around their personal data. A company’s need to protect its design IP is actually more critical than an individual’s need to protect their personal data.
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It’s 25 years since the first FED Conference took place in Berlin back in 1993, as a gathering for the German-speaking electronic and PCB-related industry. This also happened to be the year we consider as the birth of high-speed design.
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Have you ever finished generating the manufacturing release package for the latest product design and then it occurred to you that something may be wrong? Imagine, it’s Thursday night and you just finished a nice dinner with the family. Your daughter’s soccer team won and the Broncos are playing the Chiefs tonight. It will be great to relax and enjoy the game.
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DDR4, the fourth generation of DDR SDRAM technology, is the latest and greatest SDRAM standard and will continue to be until the fifth generation is released. The new standard features a point-to-point architecture that offers superior timing margins.
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Defining initial hardware architecture requires many decisions, most of which impact a variety of different stakeholders and requirements – including multiple design tools – circuit design, PCB layout, mechanical design, spreadsheets, etc. that are used to track different elements of the design.
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After a lengthy quiet period, the hardware design process is suddenly experiencing numerous changes in the form of design discipline convergence and process extension. The widely used 2D single board PCB detailed design process is being replaced by a 3D multi-board and multi-discipline one.
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The PCB design team at Renishaw work with flex PCBs and flexi-rigid boards that require detailed signal integrity analysis. To achieve the most accurate results they are working with Zuken’s electronic PCB design software to visualize boards in 3D using imported MCAD data. This also ensures that sure high-speed digital signals can be transmitted with minimal distortion.
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I recently talked on predictive failure analysis at the PTC LiveWorx 2017 conference. There was a lot of audience interest, so I thought I’d share some of the things I discussed. This is the second of two posts on this subject.
- Blog
I recently talked on predictive failure analysis at the PTC LiveWorx 2017 conference. There was a lot of audience interest, so I thought I’d share some of the things I discussed.
- Blog
No more distractions, please! 45% of our time is already spent on admin. If you’re the average engineer, that is.