Olivetti

PCB sizes vary from 5 to 20 square inches and a typical board for a printer will have eight layers and 500 components. Depending on the mix of passives and ICs, the number of pins/pads will vary from 1,800 to 2,200, with the number of nets varying from 900 to 1,700. Valetti continues: “One of the most complex designs we did recently had 902 components, three of which were high-pin-count BGAs. In total, there were about 3,000 pins/pads and about 2,000 nets for that design.”

With its increasingly demanding use of Zuken’s CADSTAR, Olivetti is keeping to an ambitious technology innovation roadmap without placing time- and volume-to-market goals at risk. “We’re extremely satisfied with CADSTAR, which has a precision feel that is very impressive for the relatively low cost. And we’re very satisfied with Zuken as a company. We recognised early on that that the local support would be good, and that’s certainly proving to be the case. It gives us the confidence to ask more and more of CADSTAR on future projects.”

Olivetti realised it could only assure reliability through rigorous test procedures and by using the latest technologies. Design for test is extremely high on Olivetti’s priorities too. “Having the best build quality possible does much to ensure product reliability in the field, and to maintain Olivetti’s good reputation. Functional tests suffice for most of our PCBs, and for the majority we also do in-circuit test (ICT) to verify the electrical connectivity between pins/pads, confirm component values for passives, and check for possible shorts. Automated optical inspection (AOI) is performed in some cases too.” For ICT it is necessary for the PCBs to have test pads and, in this respect, Olivetti has high expectations.“In the ideal world we’d have one test point per pin/pad but that’s just not possible. Instead we strive for one per net, and for high-density boards that sometimes means test points on both sides – which has cost implications – so we really try to avoid that.”

The team’s test engineers provide test point dimensions as well as clearance requirements (between test points and between test points and components) and it is Valetti’s responsibility to place these. Some come from blind or buried nets plus, of course, the very introduction or of test points can affect EMC. Here, CADSTAR comes into its own. “The tool’s built-in design rules are extremely useful for the kind of topologies we’re dealing with. The rules police what we do, but are flexible at the same time.”